PCB Design: The Top 5 Mistakes Made on Printed Circuit Board Layout

PCB Design: The Top 5 Mistakes Made on Printed Circuit Board Layout

Learn how to avoid the 5 most common PCB mistakes that are made during hardware product design.

There are a few mistakes that I see over and over when it comes to hardware design.

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More specifically, I see errors with the design of the Printed Circuit Board (PCB) that connects and holds all of the electronic components together.

Let’s take a closer look at the 5 most common PCB mistakes that I see when reviewing other designs.

#1 – Incorrect landing patterns

I’ll start with the mistake that I’ve been known to make myself.  Shocking I know.

All PCB design software tools include libraries of commonly used electronic components. These libraries include both the schematic symbol, as well as the PCB landing pattern. All is good as long as you stick with using the components in these libraries.

Problems begin when you use components not in the included libraries. This means the engineer has to manually draw the schematic symbol and the PCB landing pattern.

It’s very easy to make mistakes when drawing a landing pattern. For example, if you get the pin-pin spacing off by a fraction of a millimeter it will make it impossible to solder the part on the board.

#2 – Wireless antenna layout is not optimal

If the product has any wireless functionality the PCB layout of the antenna is super critical. Unfortunately, it’s done wrong more often than right, so watch this one very closely.

For maximum power transfer between the transceiver and the antenna their impedance must be matched. This means two things are required.

First is a proper microstrip connecting the antenna and the transceiver.

A microstrip is a type of transmission line fabricated on a PCB for carrying microwaves (high frequency radio waves). It’s a conducting strip separated from a ground plane by a dielectric layer.

In most cases the microstrip needs to be designed with a 50 ohm impedance for maximum power transfer with the antenna.

This is done by setting the microstrip’s width based on the dielectric specifications for the PCB.  I suggest you calculate this width by using a microstrip calculator.

In addition to using a 50-ohm microstrip transmission line, it’s also necessary to usually add some type of LC matching circuit like a pi-network.  This allows fine tuning of the antenna impedance for optimum matching and maximum power transfer.

There are many other common mistakes in wireless design and I’ll be writing an article just on this topic very soon.

#3 – Decoupling capacitors incorrectly located

Critical components need a clean, stable voltage source. Decoupling capacitors are placed on the power supply rail to help in this regard.

However, for decoupling capacitors to work their best they must be as close as possible to the pin requiring the stable voltage.

The power line coming from the power source needs to be routed so it goes to the decoupling capacitor before going to the pin needing a stable voltage.

Also it’s critical to place the output capacitor for the power supply regulator as close as possible to the output pin of the regulator.

This is necessary for optimizing stability (all regulators use a feedback loop that can oscillate if not properly stabilized).  It also improves transient response.

#4 – Insufficient width for power traces

If a PCB trace will have more than roughly about 500mA flowing through it then the minimum width allowed for a trace probably won’t be sufficient.

The width of the trace required depends on several things including whether the trace is on internal or external layer, and the thickness of the trace (or copper weight).

For the same thickness, an external layer can carry more current for the same width than an internal trace, because the external traces have better air flow allowing better heat dissipation.

The thickness depends on how much copper is being used for that layer. Most PCB manufacturers allow you to choose from various copper weights from 0.5 oz/sq.ft to about 2.5 oz/sq.ft. If preferred you can convert the copper weight to a thickness measurement such as mils.

When calculating the current carrying capability of a PCB trace you must specify the permissible temperature rise for that trace.

Generally a 10C rise is a safe choice, but if you need to squeeze down the trace width more you can use a 20C or higher allowed temperature rise.

Although the calculations for trace width are pretty simple I usually recommend using a trace width calculator.

#5 – Blind/buried vias not manufacturable

A typical through via goes through all layers of the board. This means even if you only want to connect a trace from layer one to layer two, that all of the other layers will also have this via.

This can act to increase the size of a board since the vias reduce the routing space on layers not even using the via.

A blind via connects an external layer to an internal layer, whereas a buried via connects two internal layers. However, they have strict limitations on which layers they can be used to connect.

It’s all too easy to use blind/buried vias that can’t actually be manufactured. I’ve seen PCB designs with a whole menagerie of blind/buried vias with most not being manufacturable.

To understand their limitations you must understand how the layers are stacked to make the board. For all of the technical details see my blog Making Your Printed Circuit Board (PCB) as Small as Possible.


These are just 5 mistakes that I frequently see in PCB designs.

Whether you are the engineer doing the design, or just the one paying for the design, I highly encourage you to obtain a second opinion before prototyping. Doing so will pay for itself many times over.

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Deepak Ghorpade

Great tips for beginners and experienced PCB designers alike.

David O'Neil

Thanks for sharing, wonderful ideas. It’s really helpful for all PCB designer.

Sourav Basak

If you are a professional PCB designer then chances are that your company has a budget to allow you a top of the range design software. However, if you are an amateur or a freelancer, you might not be able to afford the expensive subscriptions you need for the top-of-the-line software.

Anyways, read the below. This might help.

Sourav Basak
Namaste UI

Brendan Hasson
Brendan Hasson

This was very helpful! Thank you.

Yasir Shahzad

Hi JOhn Teel which types of designs you made for apple??


I have a doubt about tip #2.
Suppose that I have a transceiver IC and I need a balun and a filter (using lumped components) to match an antenna.
How to calculate the microstrips using the calculator you suggested?
Is every trace between each lumped components also a microstrip ?
Must we to consider the size and pattern of the footprint of those components ? I mean, for example for a capacitor, we can have a 0805 or 1206 size…

carl g
carl g

I was reading your post and there is one point I feel should be clarified or at least expanded on.

“The power line coming from the power source needs to be routed so it goes to the decoupling capacitor before going to the pin needing a stable voltage.”

That’s fine in low speed designs or when having to add a required bulk capacitance to a specific pin or in analog circuit’s such as power supplies.
This would also definitely be the case where you’re not using power and ground planes.

When your up in the 100’s of MHz and GHz ranges the ideal scenario is to have the caps close to a pin within some radial distance and then drop everything directly to the power and ground planes.
Adding a trace from the plane to a cap and then to a pin adds unwanted inductance which can severely degrade the ability to supply the required current at those switching speeds.(di/dt)
Ideally in a high speed design everything should have it’s own via’s to the planes to minimize inductance’s.
Keep your P/G sandwich very close in distance to maximize the inter-plane capacitance add as many caps you can and try not to share via’s.
Remember if your using power planes the capacitance is free and the decoupling caps are all additive.
In a high speed design if you string a via to a cap and then to a pin you have several parasitic inductance issues to overcome
1. the via itself
2. the traces
3. the ESL of the capacitor to both power and ground
4. the ESL of the internal wire bond from die to lead frame
All of those together can impede your power delivery network and cause stability, signal integrity, and EMI issues

Brent Betbeder
Brent Betbeder

I can add another one to this list – Check that the library parts you’re using are correct, i.e. pinouts are correct, correct PCB footprint, etc. During my career I’ve come across standard 74-series IC libraries that have incorrect details loaded, meaning I have to modify the library to get the part correct. Something that’s very easy to miss, too.

Marc England
Marc England

The trace width calculator you have put up is dated….
Ones based on the newer IPC-2152 spec are better.

Reply to  Marc England

This is really great and informative article for all pcb designer to get some ideas from it and beware from this mistake.

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